Impact of place and route strategy on FPGA electromagnetic emission

As technology scales down, dense integration and high operating frequencies associated with increased number of I/O buffers are factors contributing to electromagnetic emission (EME) increase FPGA devices. Noting that the EME depends not only on dynamic power dissipated by device, but also coupling degree between layout routed tracks signal switching activity along these tracks, it is interest challenging investigate performance. With this purpose, paper presents an analysis about impact placement routing (P&R) process logic inside chip level. goal in mind, a softcore processor was placed based three different strategies configurable block (CLB) array commercial executed application code running over system (OS). One P&R performed automatically CAD tool, whose results compared against other two manually processes FPGA. Two experiments have been performed. The obtained indicate level can be affected up 21.8% way In scenario, we suggest improve efficiency tool execute having mind EME.